1. Technical Field
Embodiments described herein are related to the field of integrated circuit implementation, and more particularly to the implementation of variable delay circuits.
2. Description of the Related Art
Computing systems may include one or more systems-on-a-chip (SoCs), which may integrate a number of different functions, such as, application execution, graphics processing and audio processing, onto a single integrated circuit. With numerous functions included in a single integrated circuit, chip count may be kept low in mobile computing systems, such as tablets, for example, which may result in reduced assembly costs, and a smaller form factor for such mobile computing systems.
SoC designs may include various signals travelling through a variety of circuits. As signals travel through a number of circuits and buffers, propagation delays may cause a transition of a signal to occur at different points in time through the variety of circuits. Under some conditions, a given signal may need to be delayed for a period of time to align its signal transitions with one or more other signals that may have encountered more propagation delays than the given signal. Assorted designs of a delay circuit may be used to accomplish this alignment. In some designs, a delay circuit may also be utilized to adjust timing of a clock circuit. For example, a delay circuit may be used in a feedback loop of a ring oscillator to help set a period of the oscillator.
Many delay circuits are designed for a fixed delay time, i.e., the delay time cannot be adjusted by hardware or software in the SoC. In such cases, a chip designer may add a delay circuit to a signal depending on results of a timing analysis of the chip. The delay time of a fixed delay circuit may vary with manufacturing process variations, supply voltage changes, and/or operating temperature changes, referred to herein as process, voltage, and temperature (PVT) changes.
In some designs, a delay circuit may be designed such that the delay time is adjustable. Such variable delay circuits may, however, may be susceptible to adding glitches to the signal being delayed when the delay time is adjusted. To prevent glitches from occurring on the signal being delayed, adjustments may be limited to when the signal is inactive.